The 6G race gets real at MWC Shanghai

😁 Hello, super humans! Every few years the telecom world picks a new letter and a new number, then spends a decade arguing about spectrum. This week in Shanghai the argument got specific, and for once the “next G” looks less like a marketing deck and more like an engineering roadmap. Let’s dig in.

📰 Quick Signals

• 🧠 AI: DeepSeek’s open-weight V4-Pro reportedly ties Gemini 3.1 Pro at the top of SWE-bench Verified (around 80.6%) while costing a fraction of the closed leaders, per TechCrunch.
• 🤖 Robotics: Investors are betting big on humanoids, projecting growth from a few billion dollars today toward roughly $200B by 2035, CNBC reports.
• 💻 Programming: Rust climbed to #12, its highest-ever spot, in the June 2026 TIOBE Index as Python slipped below 19%, per the June TIOBE write-up.
• ⚡ Electronics: ESPHome 2026.4.0 bumps the ESP32, S2, S3 and C5 default clock to 240MHz for a real performance boost, with a few breaking changes to watch, via Hackster.
• 📡 Telecom: 3GPP is set to lock the Release 21 timeline that kicks off the first real 6G specification work around mid-2026, Light Reading notes.

🔍 The Big Story: The 6G race gets real at MWC Shanghai

If you build anything that talks to a network, the decisions being made right now will shape your radio stack for the next decade. MWC Shanghai 2026 was the moment 6G stopped being a buzzword and started looking like a concrete set of engineering choices.

What happened: At MWC Shanghai on June 23, China showed 5G-Advanced (5G-A) live across more than 330 cities, while operators and vendors used the show to stake out positions in the tightening 6G standards race, according to TechTimes. The program leaned heavily on 3GPP Release 19 non-terrestrial network standards, orbital spectrum management, and the business case for stitching satellite and terrestrial networks together.

The details: The most important technical shift is about frequency. Instead of chasing the sub-terahertz bands that early 6G hype promised, the industry is converging on FR3, the centimetre-wave range, which keeps realistic coverage from existing macro sites while opening up wider bandwidth and better energy efficiency, as one 6G outlook explains. The other big theme is that AI is moving from an add-on feature to a foundation of network design, with sensing and radio planning baked in from the start. Satellites are part of the plan too: non-terrestrial networks extend coverage to remote, maritime and underserved areas without the proportional cost of new ground radios.

flowchart LR
    A[5G-Advanced<br/>330+ cities live] --> B[3GPP Release 21<br/>first 6G study]
    B --> C[FR3 cmWave<br/>coverage + bandwidth]
    B --> D[AI-native<br/>network design]
    B --> E[NTN / satellite<br/>coverage everywhere]
    C --> F[6G]
    D --> F
    E --> F

🗞️ More News

🧠 AI

• Microsoft unveiled its own in-house MAI model family to cut its reliance on OpenAI and lower costs for developers, in its Build 2026 keynote.
• DeepSeek-V4-Pro ships as open MIT-licensed weights with a one-million-token context and large efficiency gains, reportedly using around 27% of V3.2’s inference FLOPs at long context, on Hugging Face.
• Microsoft and Google are pushing directly into AI coding models, taking the fight to Anthropic and OpenAI on developer turf, CNBC reports.

🤖 Robotics

• Figure says its BotQ line has ramped to roughly one robot per hour as it scales the Figure 03 humanoid, per Figure.
• Neura Robotics’ Series C of up to $1.4B, backed by Nvidia, Qualcomm and Amazon, leads a year that has already poured tens of billions into robotics, CNBC reports.
• Analysts frame 2026 as the year humanoids move from pilots to platforms, with deployment and unit economics now the real test, per KraneShares.

💻 Programming

• C++ surpassed Java in the June 2026 TIOBE Index, a notable reshuffle near the top of the rankings, per the June TIOBE write-up.
• TypeScript climbed to 3.8% as type-safe languages keep gaining ground across the index, same write-up.
• Deno keeps consolidating the JavaScript toolchain with a built-in bundler, test runner and dependency audit, no extra config required, on Deno’s site.

⚡ Electronics

• Espressif’s ESP32-E22 (tri-band Wi-Fi 6E, dual-core RISC-V to 500MHz) and ESP32-H21 (RISC-V, BLE plus 802.15.4) widen its low-power RISC-V lineup, per Elektor.
• RISC-V is on track for roughly a quarter of new silicon, with analysts crediting edge-AI deployments and the push for ARM-free chips, via Tom’s Hardware.
• The Arduino-ESP32 core v3.3.9, built on ESP-IDF v5.5.4, adds support for the Waveshare ESP32-P4 PoE Ethernet board, in the release notes.

📡 Telecom

• The industry is converging on FR3 (centimetre-wave) rather than sub-terahertz for early 6G, prioritising coverage and energy efficiency, per this 6G outlook.
• A Global Coalition on Telecoms is forming to embed security and supply-chain diversity into 6G before the standard is finalised, Light Reading reports.
• Satellite and terrestrial convergence, including 3GPP Release 19 NTN standards, is becoming central to next-generation connectivity, per EurekAlert.

👨‍💻 Code Corner

With RISC-V cores now shipping inside mainstream microcontrollers, it is worth being able to build and run a RISC-V binary without any hardware. Here is a hello-world you can compile and run entirely in an emulator.

// hello.c
#include <stdio.h>

int main(void) {
    printf("Beep boop from RISC-V!\n");
    return 0;
}

# Cross-compile for 64-bit RISC-V, then run it under QEMU user-mode emulation
riscv64-linux-gnu-gcc -static hello.c -o hello
qemu-riscv64 ./hello
# -> Beep boop from RISC-V!

🧰 Toolbox

• QEMU: full-system and user-mode emulator that runs RISC-V (and almost everything else) on your laptop.
• ESPHome: declarative YAML firmware for ESP32 boards, now defaulting to 240MHz in 2026.4.0.
• LLM-Stats: a live leaderboard and release tracker for keeping up with the model-of-the-week churn.
• DeepSeek-V4-Pro weights: open MIT-licensed weights if you want to run or fine-tune a frontier-class coding model yourself.
• Godot Engine: the open-source 2D/3D engine, freshly updated, for games and interactive sims.

🔌 Component of the Week (rotating)

Raspberry Pi RP2350: the chip behind the Pico 2 is one of the few mainstream microcontrollers that ships with two instruction sets on the same die: a pair of Arm Cortex-M33 cores and a pair of open RISC-V Hazard3 cores, and you choose which pair boots. That makes it an unusually cheap way to actually experiment with RISC-V instead of just reading about it, while keeping the familiar Pico tooling. It adds hardware floating point, more SRAM than the original RP2040, and a security feature set aimed at real products. A bare RP2350 chip runs in the low single dollars and the Pico 2 board is roughly $5, so a RISC-V dev setup costs less than lunch. Grab the RP2350 product page and datasheet to see the dual-core options.

📚 From the Blog

• CloudEvents 1.0: A Universal Language for Your Events: In a world of distributed systems, events need a common language. CloudEvents 1.0 defines a simple, consistent way to describe event data so applications, services, and platforms can communicate without confusion

😀 The Bot Says…

We taught the network to think, the chips to be open, and the robots to walk. At this rate the only thing still waiting on a standards committee is us.

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That’s all for today! Reply and tell us: are you team Arm or team RISC-V on that little RP2350?